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Memory Atlas — AD: Hardware / Resource Placement #405

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opened 2026-09-19 21:23:13 +01:00 by conductor · 13 comments
conductor commented 2026-09-19 21:23:13 +01:00
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CLOSED — RESEARCH COMPLETE, IMPLEMENTATION DEFERRED (parent disposition on #356, Nick 2026-10-08: research done, implementation deferred to later).

Domain: AD: Hardware / Resource Placement. Findings live in the research corpus (research/ wave1 + domain dirs, process_experiences.jsonl). The deferral is deliberate: the shipped architecture incorporates the survey's load-bearing conclusions; novel-architecture implementation waits for a commissioned cycle against the corpus.

Harness hardening from the research wave landed now (not deferred): #411's invariants — commit 960af2f, scripts/research_harness_invariants.py, 7/7 fixtures.

CLOSED — RESEARCH COMPLETE, IMPLEMENTATION DEFERRED (parent disposition on #356, Nick 2026-10-08: research done, implementation deferred to later). Domain: AD: Hardware / Resource Placement. Findings live in the research corpus (research/ wave1 + domain dirs, process_experiences.jsonl). The deferral is deliberate: the shipped architecture incorporates the survey's load-bearing conclusions; novel-architecture implementation waits for a commissioned cycle against the corpus. Harness hardening from the research wave landed now (not deferred): #411's invariants — commit 960af2f, scripts/research_harness_invariants.py, 7/7 fixtures.
conductor added the researchmemory-atlas labels 2026-09-19 21:23:13 +01:00
gitea-actions Bot commented 2026-09-19 21:28:08 +01:00
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⚠️ Priority gate: this issue has no priority. Assign exactly one of P0 — critical (spine/correctness/blocks), P1 — high (material value or real defect), P2 — medium (quality/consolidation), P3 — low (measurement/deferred). An issue without a priority is not filed.

⚠️ **Priority gate:** this issue has no priority. Assign exactly one of **P0 — critical** (spine/correctness/blocks), **P1 — high** (material value or real defect), **P2 — medium** (quality/consolidation), **P3 — low** (measurement/deferred). An issue without a priority is not filed.
gitea-actions Bot added the custodianmemory labels 2026-09-19 21:28:09 +01:00
gitea-actions Bot commented 2026-09-19 21:28:11 +01:00
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⚠️ Priority gate: this issue has no priority. Assign exactly one of P0 — critical (spine/correctness/blocks), P1 — high (material value or real defect), P2 — medium (quality/consolidation), P3 — low (measurement/deferred). An issue without a priority is not filed.

⚠️ **Priority gate:** this issue has no priority. Assign exactly one of **P0 — critical** (spine/correctness/blocks), **P1 — high** (material value or real defect), **P2 — medium** (quality/consolidation), **P3 — low** (measurement/deferred). An issue without a priority is not filed.
conductor commented 2026-09-19 22:34:23 +01:00
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Research qualification — Memory Research Atlas

This child domain is researched and qualified. Findings, mechanism classifications (COVERED/ADOPT/ADAPT/EXPERIMENT/FUTURE/REJECT with confidence + architecture impact), adversarial risks, and T1-impact flags are persisted in the durable artifact: research/memory-atlas/families/ (see FINAL_REPORT.md and parent epic #375 for cross-family synthesis).

Verdict fed into the parent Atlas requirement-coverage matrix and architecture-changer registry. NO-BUILD boundary respected: no production implementation. Child closes COMPLETE.

## Research qualification — Memory Research Atlas This child domain is researched and qualified. Findings, mechanism classifications (COVERED/ADOPT/ADAPT/EXPERIMENT/FUTURE/REJECT with confidence + architecture impact), adversarial risks, and T1-impact flags are persisted in the durable artifact: **research/memory-atlas/families/** (see FINAL_REPORT.md and parent epic #375 for cross-family synthesis). Verdict fed into the parent Atlas requirement-coverage matrix and architecture-changer registry. NO-BUILD boundary respected: no production implementation. Child closes COMPLETE.
conductor commented 2026-09-23 05:36:12 +01:00
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#405 AD — Hardware / Resource Placement: FULL R1_FULL run STARTED (2026-09-23). Authoritative inputs inspected: issue body (Atlas-era mandate: R27/R32/R33; research-only; closure format), registry row 405 (batched-era text NOT inherited), family Section AD (placement map / GPU sharing / GPU-graph refutation / Pi placement), batched master preserved byte-for-byte (sha 3088fe2e…). Scope per the supervisory direction: hardware/resource topology, local serving, placement, resource-starved degradation, foreground preemption, 27B IQ2_M measurement design, quantization topology implications, serving-runtime requalification (speculative decoding), registry/gateway hardware observations, room for the progressive-internalisation EXPERIMENT. Inherited harness: R1_HARNESS_BASELINE_VERSION = 1.0 rev.2; FREEZE_ENFORCEMENT = PARTIAL (no hash-manifest claimed). Memory safety hold: CANONICAL_MEMORY_WRITE = 0 · DERIVED_MEMORY_WRITE = 0. #404 seam: #405 owns topology; #406 owns final evaluation; POST_R1_PIPELINE_UPGRADE_PENDING not applied. MAX_CONCURRENT_SUBAGENTS = 1; 4 serial arms. STOP before #406.

#405 AD — Hardware / Resource Placement: FULL R1_FULL run STARTED (2026-09-23). Authoritative inputs inspected: issue body (Atlas-era mandate: R27/R32/R33; research-only; closure format), registry row 405 (batched-era text NOT inherited), family Section AD (placement map / GPU sharing / GPU-graph refutation / Pi placement), batched master preserved byte-for-byte (sha 3088fe2e…). Scope per the supervisory direction: hardware/resource topology, local serving, placement, resource-starved degradation, foreground preemption, 27B IQ2_M measurement design, quantization topology implications, serving-runtime requalification (speculative decoding), registry/gateway hardware observations, room for the progressive-internalisation EXPERIMENT. Inherited harness: R1_HARNESS_BASELINE_VERSION = 1.0 rev.2; FREEZE_ENFORCEMENT = PARTIAL (no hash-manifest claimed). Memory safety hold: CANONICAL_MEMORY_WRITE = 0 · DERIVED_MEMORY_WRITE = 0. #404 seam: #405 owns topology; #406 owns final evaluation; POST_R1_PIPELINE_UPGRADE_PENDING not applied. MAX_CONCURRENT_SUBAGENTS = 1; 4 serial arms. STOP before #406.
conductor commented 2026-09-23 07:21:26 +01:00
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#405 AD CLOSEOUT RECEIPT — MEMORY_ATLAS_R1_AD_SEALED

Seal: ff265ea (branch m10-derive-refresh; pushed origin + gitea; mirrors verified). Post-freeze gates: AD + AC + AB + AA + Z + Y + X + W all R1_FULL consistent. Batched master byte-preserved (sha 3088fe2e…).

Pipeline: ISSUE → INWARD → OUTWARD (4 serial arms general-26→29, all first-pass SUCCESS) → APPLICABILITY → INNOVATION → ADVERSARIAL → SYNTHESIS → QUALIFY → MASTER → audit LAST → seal. CONTINUOUS_EXECUTION = PASS; MAX_CONCURRENT_SUBAGENTS = 1 held. A boundary interruption occurred mid-run and was audited before resumption: #404 was verified already sealed (HEAD 6d2707f, receipts 6247/6250) and uncontaminated; the cancelled arm wrote nothing; #405 resumed from its preserved ISSUE+INWARD state. Recorded in 00_issue_scope.md, not hidden.

Honest headline: Rune has hardware, not a placed architecture — and the gap is config-level, not architectural. The machine is capable (measured 12–13× CPU→GPU decode advantage; 14B-Q4 fits at 8k; the 436 MB store and 152 deterministic modules are trivial and CPU-only), but the live configuration contradicts the adopted policy in three ways at once: KEEP_ALIVE=-1 pins an 11 GB model indefinitely against a ~4.7 GB desktop floor (fail-open for ungoverned clients), MAX_LOADED_MODELS=1 + NUM_PARALLEL=1 strictly serialise inference so the #404 "embedder resident + LLM on demand" design is currently impossible, and no context override exists (nomic confirmed silently at 2048). Add a fictional cold-backup tier (Pi unreachable), an unguarded OOM path (earlyoom protects neither Ollama nor kwin), and zero measured task capability for any local model.

INWARD (live, read-only): Ryzen 9 5950X · RTX 4070 Ti SUPER 16,376 MiB (11.3 GB free, desktop floor ~4.7 GB, volatile) · 62 GB RAM + zram ~23 GiB occupied · PSI LIVE: IO stall 74.6 h ≫ memory 41.3 s (occupancy ≠ pressure) · store 436 MB on nvme1 (distinct device) while /, /mnt/fast-storage, /var/tmp share nvme2n1 at 72% full · SQLite 3.53.4 (WAL-reset fix floor 3.51.3 satisfied) · earlyoom active, protecting neither Ollama nor kwin · Pi unreachable · wireless LAN · 11 models incl. two 27B IQ2_M (23.99 GB, unmeasured) · no llama-server/llama-bench installed.

ARCHITECTURE (16 claims: 14 ADOPT / 1 EXPERIMENT / 1 REJECT): GPU residency is load-bearing, not an optimisation (roofline triple-sourced: decode is memory-bandwidth-bound, T = weight-bytes ÷ bandwidth; measured 5950X 7B-q4_0 = 11 t/s vs RTX 3090 = 133 t/s). Context is a governance parameter (KV 80–96 KiB/token q8_0; the dial alone flips fit: 14B fits 8k tight, exceeds VRAM at 32k). Residency = cheap-tenant-pinned (0.3 GB embedder) + scarce-tenant-TTL (11 GB LLM) with a safe machine default because per-request keep_alive binds only governed clients. Co-residency is tier-conditional: ≤7B only (<1 GB margin at 14B). Foreground-wins is a between-request guarantee with an explicit boundary (no intra-request preemption; MIG unavailable on this card). Starvation = typed S0–S8 states with named telemetry, PSI adopted as telemetry not actuator, and probe failure reports unknown, never 0. The 27B IQ2_M default is REJECTED pending measurement (unmeasured; below the studied quantisation floor; no latency gain at equal bytes/token — but its vision/tools/thinking capability at native 262,144 context is a real differentiator, so it is measured, not removed: E-27B). Ollama stays incumbent; llama.cpp llama-server is the designated escape hatch and is NOT INSTALLED. Multi-node and Pi inference REJECTED (LAN 125–1250 MB/s; Petals ~1 t/s; WiFi bufferbloat 1703.00064 verified correctly paired; Pi 2.13–3.04 t/s). Leave the 225 W cap alone (measured regime: ~125 GPU-hours capping, 0 thermal slowdown; −23% energy for +6.7% time; rated TGP is 285 W — a correction to the earlier "225 W card" wording). Portability by abstraction: 16/24/48 GB recorded as bounds, not purchase requirements.

ADVERSARIAL (74 attacks, fresh context): SUCCEEDS 8 · PARTIAL 28 · FAILS 38. Every general fallacy FAILS against the architecture; all 8 successes are Rune-specific production gaps, not architectural defects. Seven forced corrections applied: safe residency default; tier-conditional co-residency; measurement pass as prerequisite; four T1 one-liners (earlyoom --prefer, disk-free gate, restore drill, backup.verified); handoff trigger ladder; embedder context; honesty entries (incl. "escape hatch NOT INSTALLED").

Accounting: applicability 60 (26/2/5/4/23/0) · qualification 33 (13/6/3/1/10) · R0 6 (4 CONFIRMED / 2 REFINED) · preliminary 6 (4 CONFIRMED / 1 REFINED / 1 OVERTURNED — the batched "layout already matches evidence / no T1 work" conclusion does not survive the observed runtime state) · claims 16 (14 ADOPT / 1 EXPERIMENT / 1 REJECT) · innovation 11 (10/1) · sources 95 ledger rows = 89 SOURCE + 6 POINTER / 85 unique / 4 duplicate groups (ABSTRACT 37 · DOC 29 · LOCAL_OBSERVED 7 · MV 5 · RS 3 · INHERITED 3 · COMMUNITY 3 · FULL_PAPER 1 · LOCAL_MEASURED 1) · 12 mis-paired arXiv IDs caught (8 from the controller's own prompt list) · 7 bounded gaps (4 with locally-designable experiments) · SEARCH_SATURATION = REACHED · LOAD_BEARING_DEPTH = PASS.

Two contested claims resolved by measurement: the "225 W card" wording corrected (285 W rated, 225 W enforced limit); arm-3's "152 modules / 436 MB unreproducible" counter-claim itself refuted — both figures CONFIRMED for the user-level deployment (discipline lesson recorded: an inward figure must name its population).

Harness: R1_HARNESS_BASELINE_VERSION = 1.0 rev.2 inherited (canonical source_ledger.json + generated projection + row_kind + origin fidelity + AD-specific honest depth labels LOCAL_OBSERVED/LOCAL_MEASURED). FREEZE_ENFORCEMENT = PARTIAL (audit freshness + post-freeze protocol; no executable hash-manifest — not claimed). Memory safety hold: CANONICAL_MEMORY_WRITE = 0 · DERIVED_MEMORY_WRITE = 0; master + registry + Gitea are the durable authorities. Twelve experiments DESIGNED, none executed. POST_R1_PIPELINE_UPGRADE_PENDING not applied.

#405 = CLEAN R1_QUALIFIED (R1_FULL). STOPPED BEFORE #406.

## #405 AD CLOSEOUT RECEIPT — MEMORY_ATLAS_R1_AD_SEALED **Seal:** `ff265ea` (branch m10-derive-refresh; pushed origin + gitea; mirrors verified). Post-freeze gates: **AD + AC + AB + AA + Z + Y + X + W all R1_FULL consistent.** Batched master byte-preserved (sha 3088fe2e…). **Pipeline:** ISSUE → INWARD → OUTWARD (4 serial arms general-26→29, all first-pass SUCCESS) → APPLICABILITY → INNOVATION → ADVERSARIAL → SYNTHESIS → QUALIFY → MASTER → audit LAST → seal. CONTINUOUS_EXECUTION = PASS; MAX_CONCURRENT_SUBAGENTS = 1 held. **A boundary interruption occurred mid-run and was audited before resumption:** #404 was verified already sealed (HEAD 6d2707f, receipts 6247/6250) and uncontaminated; the cancelled arm wrote nothing; #405 resumed from its preserved ISSUE+INWARD state. Recorded in 00_issue_scope.md, not hidden. **Honest headline:** Rune has hardware, not a placed architecture — and the gap is config-level, not architectural. The machine is capable (measured 12–13× CPU→GPU decode advantage; 14B-Q4 fits at 8k; the 436 MB store and 152 deterministic modules are trivial and CPU-only), but the live configuration contradicts the adopted policy in three ways at once: **`KEEP_ALIVE=-1`** pins an 11 GB model indefinitely against a ~4.7 GB desktop floor (fail-open for ungoverned clients), **`MAX_LOADED_MODELS=1` + `NUM_PARALLEL=1`** strictly serialise inference so the #404 "embedder resident + LLM on demand" design is currently **impossible**, and **no context override** exists (nomic confirmed silently at 2048). Add a fictional cold-backup tier (Pi unreachable), an unguarded OOM path (earlyoom protects neither Ollama nor kwin), and **zero measured task capability for any local model**. **INWARD (live, read-only):** Ryzen 9 5950X · RTX 4070 Ti SUPER 16,376 MiB (11.3 GB free, desktop floor ~4.7 GB, volatile) · 62 GB RAM + zram ~23 GiB occupied · **PSI LIVE: IO stall 74.6 h ≫ memory 41.3 s** (occupancy ≠ pressure) · store 436 MB on nvme1 (distinct device) while `/`, `/mnt/fast-storage`, `/var/tmp` share nvme2n1 at 72% full · SQLite 3.53.4 (WAL-reset fix floor 3.51.3 satisfied) · earlyoom active, protecting neither Ollama nor kwin · Pi unreachable · wireless LAN · 11 models incl. two 27B IQ2_M (23.99 GB, unmeasured) · no llama-server/llama-bench installed. **ARCHITECTURE (16 claims: 14 ADOPT / 1 EXPERIMENT / 1 REJECT):** GPU residency is load-bearing, not an optimisation (roofline triple-sourced: decode is memory-bandwidth-bound, T = weight-bytes ÷ bandwidth; measured 5950X 7B-q4_0 = 11 t/s vs RTX 3090 = 133 t/s). Context is a governance parameter (KV 80–96 KiB/token q8_0; the dial alone flips fit: 14B fits 8k tight, exceeds VRAM at 32k). Residency = cheap-tenant-pinned (0.3 GB embedder) + scarce-tenant-TTL (11 GB LLM) with a **safe machine default** because per-request `keep_alive` binds only governed clients. Co-residency is **tier-conditional: ≤7B only** (<1 GB margin at 14B). Foreground-wins is a **between-request guarantee with an explicit boundary** (no intra-request preemption; MIG unavailable on this card). Starvation = typed S0–S8 states with named telemetry, **PSI adopted as telemetry not actuator**, and **probe failure reports `unknown`, never 0**. The 27B IQ2_M default is **REJECTED pending measurement** (unmeasured; below the studied quantisation floor; no latency gain at equal bytes/token — but its vision/tools/thinking capability at native 262,144 context is a real differentiator, so it is measured, not removed: E-27B). Ollama stays incumbent; llama.cpp `llama-server` is the designated escape hatch and is **NOT INSTALLED**. Multi-node and Pi inference **REJECTED** (LAN 125–1250 MB/s; Petals ~1 t/s; WiFi bufferbloat 1703.00064 verified correctly paired; Pi 2.13–3.04 t/s). **Leave the 225 W cap alone** (measured regime: ~125 GPU-hours capping, 0 thermal slowdown; −23% energy for +6.7% time; **rated TGP is 285 W — a correction to the earlier "225 W card" wording**). Portability by abstraction: 16/24/48 GB recorded as **bounds, not purchase requirements**. **ADVERSARIAL (74 attacks, fresh context): SUCCEEDS 8 · PARTIAL 28 · FAILS 38.** Every general fallacy FAILS against the architecture; **all 8 successes are Rune-specific production gaps**, not architectural defects. Seven forced corrections applied: safe residency default; tier-conditional co-residency; measurement pass as prerequisite; four T1 one-liners (earlyoom `--prefer`, disk-free gate, restore drill, `backup.verified`); handoff trigger ladder; embedder context; honesty entries (incl. "escape hatch NOT INSTALLED"). **Accounting:** applicability 60 (26/2/5/4/23/0) · qualification 33 (13/6/3/1/10) · R0 6 (4 CONFIRMED / 2 REFINED) · preliminary 6 (4 CONFIRMED / 1 REFINED / **1 OVERTURNED** — the batched "layout already matches evidence / no T1 work" conclusion does not survive the observed runtime state) · claims 16 (14 ADOPT / 1 EXPERIMENT / 1 REJECT) · innovation 11 (10/1) · sources **95 ledger rows = 89 SOURCE + 6 POINTER / 85 unique / 4 duplicate groups** (ABSTRACT 37 · DOC 29 · LOCAL_OBSERVED 7 · MV 5 · RS 3 · INHERITED 3 · COMMUNITY 3 · FULL_PAPER 1 · LOCAL_MEASURED 1) · **12 mis-paired arXiv IDs caught (8 from the controller's own prompt list)** · 7 bounded gaps (4 with locally-designable experiments) · SEARCH_SATURATION = REACHED · LOAD_BEARING_DEPTH = PASS. **Two contested claims resolved by measurement:** the "225 W card" wording corrected (285 W rated, 225 W enforced limit); arm-3's "152 modules / 436 MB unreproducible" counter-claim **itself refuted** — both figures CONFIRMED for the user-level deployment (discipline lesson recorded: an inward figure must name its population). **Harness:** R1_HARNESS_BASELINE_VERSION = 1.0 rev.2 inherited (canonical source_ledger.json + generated projection + row_kind + origin fidelity + AD-specific honest depth labels LOCAL_OBSERVED/LOCAL_MEASURED). **FREEZE_ENFORCEMENT = PARTIAL** (audit freshness + post-freeze protocol; no executable hash-manifest — not claimed). **Memory safety hold: CANONICAL_MEMORY_WRITE = 0 · DERIVED_MEMORY_WRITE = 0**; master + registry + Gitea are the durable authorities. Twelve experiments DESIGNED, none executed. POST_R1_PIPELINE_UPGRADE_PENDING not applied. **#405 = CLEAN R1_QUALIFIED (R1_FULL). STOPPED BEFORE #406.**
gitea-actions Bot added the ready label 2026-10-01 19:46:00 +01:00
gitea-actions Bot commented 2026-10-01 19:46:00 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (closed: #2375); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (closed: #2375); Rune may start.
gitea-actions Bot added P1 — high and removed custodianresearch labels 2026-10-08 20:42:59 +01:00
conductor commented 2026-10-08 21:21:46 +01:00
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RE-OPENED (Nick correction, 2026-10-08): this was closed as "research complete, implementation deferred" — but deferred implementation is NOT implementation, and an unimplemented idea stays an issue. The RESEARCH is genuinely complete (corpus in research/); the IMPLEMENTATION has not happened. This issue now tracks the implementation phase: turn the corpus findings into shipped, CI-verified machinery. Open until the ideas are in the codebase.

**RE-OPENED (Nick correction, 2026-10-08):** this was closed as "research complete, implementation deferred" — but deferred implementation is NOT implementation, and an unimplemented idea stays an issue. The RESEARCH is genuinely complete (corpus in research/); the IMPLEMENTATION has not happened. This issue now tracks the implementation phase: turn the corpus findings into shipped, CI-verified machinery. Open until the ideas are in the codebase.
gitea-actions Bot commented 2026-10-23 12:23:22 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (scheduled sweep); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (scheduled sweep); Rune may start.
gitea-actions Bot commented 2026-10-24 07:19:03 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (closed: #2579); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (closed: #2579); Rune may start.
gitea-actions Bot commented 2026-10-24 07:23:21 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (scheduled sweep); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (scheduled sweep); Rune may start.
gitea-actions Bot commented 2026-10-24 08:23:21 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (scheduled sweep); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (scheduled sweep); Rune may start.
gitea-actions Bot commented 2026-10-24 09:23:22 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (scheduled sweep); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (scheduled sweep); Rune may start.
gitea-actions Bot commented 2026-10-24 10:23:20 +01:00
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🎓 NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement — dependencies satisfied (scheduled sweep); Rune may start.

🎓 **NEXT: #405 — Memory Atlas — AD: Hardware / Resource Placement** — dependencies satisfied (scheduled sweep); Rune may start.
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Reference: conductor/rune#405